David Allee

Allee_DavidWEBProfessor
ASU Directory Profile

Personal Webpage

GWC 347
480-965-6470
allee@asu.edu

Research expertise
Ultra-small device fabrication mixed-signal circuit design for analog-to-digital conversion and telemetry

David R. Allee (B.S. in Electrical Engineering, University of Cincinnati; M.S. and Ph.D. in Electrical Engineering, Stanford University) is a professor of electrical engineering at Arizona State University. While at Stanford University, and as a research associate at Cambridge University, he fabricated field effect transistors with ultra-short gate lengths using custom e-beam lithography and invented several ultra-high resolution lithography techniques. Since joining Arizona State University, his focus has been on mixed signal integrated circuit design. Allee is currently Director of Research for Backplane Electronics for the Flexible Display Center (flexdisplay.asu.edu) funded by the Army, and he is investigating a variety of flexible electronics applications. He has been a regular consultant with several semiconductor industries on low voltage and low power mixed signal CMOS circuit design. He has co-authored over 100 archival scientific publications and patents.

Collaborations and industry affiliations
ARI-MA: very large area, high-sensitivity neutron detection system, NSF-ENG
Neutron detector, University of Texas, Dallas

Professional preparation
Postdoctoral Researcher, Cambridge University, 1990-1991
Ph.D., electrical engineering, Stanford University, 1990
M.S., electrical engineering, Stanford University, 1986
B.S., electrical engineering, University of Cincinnati, 1984

Recognition and awards
Best Teacher Award, College of Engineering, 2008
Young Faculty Teaching Excellence Award, 1994-1995
AEA Faculty Development Fellowship, Stanford University, 1984-1989
Voorheis Honor Scholarship, University of Cincinnati, 1979-1984

Selected publications
Ed Lee, George Kunnen, Alfonso Dominguez, David R. Allee, “A low noise dual stage a-Si:H active pixel sensor,” IEEE Transactions on Electron Devices, vol. 59, no. 6, pp. 1679-1685, June 2012

Aritra Dey, Sameer Venugopal, David R. Allee and Lawrence T. Clark, “Impact of Drain Bias Stress on Forward/Reverse Mode Operation of a-ZIO TFTs,” Solid State Electronics, vol. 62, pp. 19-24, 2011

Edward H. Lee, Anil Indluru, David R. Allee, Lawrence T. Clark, Keith E. Holbert, and Terry L. Alford, “Effects of Gamma Irradiation and Electrical Stress on a-Si:H Thin-Film Transistors for Flexible Electronics and Displays,” IEEE Journal of Display Technology, vol. 7, no. 6, pp. 325 – 329, 2011

Aritra Dey, Adrian Avendanno, Sameer Venugopal, David R. Allee, Manuel Quevedo, and Bruce Gnade, “CMOS TFT Op-Amps: Performance and Limitations,” IEEE Electron Device Letters, vol. 32, no. 5, pp. 650-652, 2011

Korhan Kaftanoglu, Sameer M. Venugopal, Michael Marrs, Aritra Dey, James R. Wilson, Edward Bawolek, David R. Allee, and Doug Loy, “Stability of IZO and a-Si:H TFTs Processed at Low Temperature (200C)” IEEE Journal of Display Technology, vol. 7, no. 6, pp. 339-343, 2011