ASU Directory Profile
Research expertise: Semiconductor device physics, semiconductor transport, 1-D to 3-D device modeling, quantum field theory and its application to real nanoscale device structures, heating effects in nano-scale devices, current collapse in GaN HEMTs, optoelectronics including modeling of solar cells and photodetectors
Dragica Vasileska joined the ASU faculty in August 1997. She has published over 180 journal articles in prestigious refereed journals, 15 book chapters and presented over 200 articles in conferences in the areas of solid-state electronics, transport in semiconductors and semiconductor device modeling. She is the third largest contributor in the NSF Network for Computational Nanotechnology’s www.nanoHUB.org with a total of 380 contributions and 18 educational simulation modules. She is an author of four books (D. Vasileska and S. M. Goodnick, Computational Electronics, Morgan & Claypool, 2006; D. Vasileska, Editor, Cutting Edge Nanodechnology, March 2010; D. Vasileska, S. M. Goodnick and G. Klimeck: Computational Electronics: From Semi-Classical to Quantum Transport Modeling, CRC Press, June 2010; and D. Vasileska and S. M. Goodnick, Editors, Nanoelectronic Devices: Semiclassical and Quantum Transport Modeling, Springer, in press). She has also given numerous invited and plenary talks. She is a senior member of IEEE and a member of Phi Kappa Phi.
Ph.D., electrical engineering, Arizona State University, 1995
M.S., electrical engineering, University, 1991
B.S., electrical engineering, University, 1985
Recognition and awards
Listed in Who’s Who (2007), NSF CAREER Award (1998), University Cyril and Methodius, Skopje, Republic of Macedonia, College of Engineering Award for Best Achievement in One Year (1981-1985), University Cyril and Methodius, Skopje, Republic of Macedonia, Award for Best Student from the College of Engineering (1985 and 1990)
Brinkman at al., “Self-Consistent Simulation of CdTe Solar Cells with Active Defects”, J. Applied Phys. (in press)
Vasileska, “Modeling Thermal Effects in Nano-Devices,” Microelectronic Engineering, Vol. 109 (9), pp. 163–167, 2013.
Vasileska, G. Klimeck, A. Magana, and S. M. Goodnick, Tool-Based Curricula and Visual Learning, Electronics, Vol. 17, No. 2, December 2013, pp. 95-104.
Padmanabhan, D. Vasileska and S. M. Goodnick, “Current degradation in GaN HEMTs: Is Self-Heating Responsible?” ECS (Electrochemical Society) Transactions, Vol. 49(1): pp.103-109, 2012.
Ashok, D. Vasileska, O. Hartin and S. M. Goodnick, Importance of the Gate-Dependent Polarization Charge on the Operation of GaN HEMTs, IEEE Transactions on Electron Devices, Vol. 56, pp. 998-1006, May 2009.
R. Khan, D. Mamaluy and D. Vasileska, “Approaching Optimal Characteristics of 10 nm High Performance Devices” a Quantum Transport Simulation Study of Si FinFET, IEEE Trans. Electron Devices, Vol. 55(1), pp. 743-753 (2008).
Raleva, D. Vasileska, S. M. Goodnick, and M. Nedjalkov, “Modeling thermal effects in nanodevices,” IEEE Transactions on Electron Devices, vol. 55, issue 6, pp. 1306-1316, June 2008.
Raleva, D. Vasileska, and S. M. Goodnick, “Is SOD technology the solution to heating problems in SOI devices?” Electron Device Letters, IEEE, vol. 29, issue 6, pp. 621-624, June 2008.