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Engineering | School of Electrical, Computer and Energy Engineering

Chaitali Chakrabarti

ASU Directory Profile

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GWC 302B

Research expertise: VLSI architectures for media processing and wireless communications, algorithm-architecture co-design of signal processing systems including medical imaging, low-power embedded systems, reliable memory system design

Chaitali Chakrabarti received her B.Tech. in electronics and electrical communication engineering from the Indian Institute of Technology, Kharagpur, India, and her M.S. and Ph.D. degrees in electrical engineering from the University of Maryland, College Park. She is on the editorial board of IEEE JETCAS and an IEEE fellow.

Collaborations and industry affiliations
Chakrabarti, Chaitali * . Neuromorphic Visual System for Intelligent Unmanned Sensors. UNIV OF SOUTHERN CA (11/1/2009 – 4/30/2012).
Chakrabarti, Chaitali * . CSR:Large:Collaborative Research:Reclaiming Moore’s Law Through Ultra Energy Efficient Computing. NSF-ENG-ECS (8/1/2009 – 7/31/2014).
Papandreou-Suppappola, Antonia * Chakrabarti, Chaitali Spanias, Andreas Savva . Biomedical Innovations Using Implementation-Aware Agile Sensing and Signal Processing. NSF-CISE-CCR (8/1/2008 – 7/31/2012).
Chakrabarti, Chaitali * . CSR–EHS: Collaborative Research: Hardware/Software Co-Exploration of Scalable Software Defined Radio Platforms. NSF-CISE (9/1/2006 – 8/31/2010).
Chakrabarti, Chaitali * Chatha, Karamvir Singh Chatha, Karamvir Singh Vrudhula, Sarma BK Vrudhula, Sarma BK . CSR-EHS: Analytical Techniques for Global Energy Minimizaiton of a System of Interacting Components. NSF-CISE (8/1/2005 – 5/31/2010).
Chakrabarti, Chaitali * . FANTOM: Algorithm-Architecture Codesign for High Performance Signal and Image Processing. DUKE UNIV (5/3/2005 – 2/28/2010).

Professional preparation
Ph.D., electrical engineering, University of Maryland, 1990
M.S., electrical engineering, University of Maryland, 1986
B.S., tech electronics and electrical communication, Indian Institute of Technology, 1984

Recognition and awards: Best Paper Awards in SAMOS (2007), MICRO (2008), SiPS (2010) and HPCA (2013); MICRO Top Picks (2007, 2010, 2014); Outstanding Educator Award, IEEE Phoenix section (2001); Ira A. Fulton Schools of Engineering Top 5% Award (2012, 2014); Distinguished Alumni Award, Dept. of Electrical and Computer Engineering, University of Maryland, College Park (2013); Fulton Exemplar Faculty Award (2014)

Selected publication

H.-M, Chen, A. Arunkumar, S. Jeloka, D. Blaauw, C.-J. Wu, T. Mudge and C. Chakrabarti, “Using Low Cost Erasure and Error Correction Schemes to Improve reliability of Commodity DRAM Systems,” IEEE Trans on Computers, April 2016 (online).

M. Yang, R. Sampson, S. Wei, T. F. Wenisch and C. Chakrabarti, “Separable Beamforming for 3-D Medical Ultrasoudn Imaging,” IEEE Trans on Signal Processing, pp. 279-290, Feb 2015.

R. Sampson, M. Yang, S. Wei, C. Chakrabarti and T. F. Wenisch, “Sonic Millip3De: Massively Parallel 3D Stacked Accelerator for 3D Ultrasound,” Proc. of High Performance Computer Architecture, pp. 318-329, Feb 2013, Best Paper Award.

Y. Emre and C. Chakrabarti, “Energy and Quality-Aware Multimedia Signal Processing,” IEEE Trans on Multimedia, pp. 1579-1593, Nov 2013.

B. Giridhar, M. Cieslak, D. Duggal, H.-M. Chen, R. Dreslinski, R. Patti, B. Hold, C. Chakrabarti, T. Mudge and D. Blaauw, “Exploring DRAM Optimizations for Energy-Efficient and Resilient Exascale Memories,” Proceedings of the Supercomputing Conference, 23:1-23:12, 2013.

L. Miao, J. J. Zhang, C. Chakrabarti, and A. Papandreou-Suppappola, “Efficient Bayesian Tracking of Multiple Sources of Neural Activity: Algorithms and Real-Time FPGA Implementation,” IEEE Trans on Signal Processing, pp. 633-647, March 2013.

C. Yang, Y. Emre, Y. Cao and C. Chakrabarti, “Improving Reliability of Non-volatile Memory Technologies through Circuit-level Techniques and Error Control Coding,” EURASIP Journal on Advances in Signal Processing, 2012:211, Sep 2012.

M. Woh, S. Seo, S. Mahlke, T. Mudge, and C. Chakrabarti, “AnySP: Anytime Anywhere Anyway Signal Processing,” IEEE MICRO Top Picks, pp. 81-91 January/February 2010.