ASU Directory Profile
Semiconductor device physics, semiconductor transport, 1-D to 3-D device modeling, quantum field theory and its application to real device structures, spin transport, heating effects in nano-scale devices, current collapse in GaN HEMTs, modeling of solar cells.
Dragica Vasileska joined the ASU faculty in August 1997. She has published over 160 journal articles in prestigious refereed journals, 20 book chapters and more than 80 articles in conference proceedings in the areas of solid-state electronics, transport in semiconductors, and semiconductor device modeling. She has co-authored 3 books: D. Vasileska and S. M. Goodnick, Computational Electronics, Morgan and Claypool, 2006; D. Vasileska, S. M. Goodnick and G. Klimeck. Computational Electronics: Semiclassical and Quantum Transport Modeling, Taylor & Francis, June 2010, D. Vasileska and S. M. Goodnick (Eds.) Nanoelectronic Devices: Semiclassical and Quantum Transport, Springer, july 2011. She has given numerous invited talks. She is a senior member of IEEE and member of Phi Kappa Phi.
Ph.D., electrical engineering, Arizona State University, 1995
M.S., electrical engineering, University, 1991
B.S., electrical engineering, University, 1985
Recognition and awards
ISDRS 2011 Conference: Best Student Oral Presentation Award, Devices: Balaji Padmanabhan, Dragica Vasileska, and Stephen Goodnick (Arizona State University), “Modeling Reliability of GaN/AlGaN/AlN/GaN HEMT”
Award from the 2004 LDSD conference for best poster
Award from the 2004 LDSD conference for best paper
Recipient of the 1999 NSF Early CAREER Award
Listed in Who’s Who 2007, NSF CAREER Award, 1998
University Cyril and Methodius, Skopje, Republic of Macedonia, College of Engineering Award for Best Achievement in One Year, 1981-1985
University Cyril and Methodius, Skopje, Republic of Macedonia, Award for Best Student from the College of Engineering in 1985 and 1990
N. Ashraf, D. Vasileska, G. Wirth and P. Srinivasan, Accurate Model for the Threshold Voltage Fluctuations Estimation in 45 nm Channel Length MOSFET Devices in the Presence of Random Traps and Random Dopants, IEEE Electron Dev. Lett., Vol. 32, pp. 1044-1046 (2011).
A. Ashwin, D. Vasileska, O. Hartin and S. M. Goodnick, “Importance of the Gate-Dependent Polarization Charge on the Operation of GaN HEMTs,” IEEE Transactions on Electron Devices, vol. 56, 998-1006, May 2009.