ASU Directory Profile
Research expertise: Analog, RF and mixed-signal IC design, integrated power management circuits for high reliability applications, self-test and calibration of high reliability analog and mixed signal circuits, frequency synthesizers
Bertan Bakkaloglu joined the Arizona State University faculty in August 2004. He received a PhD in electrical and computer engineering in 1995 from Oregon State University. Prior to ASU, Professor Bakkaloglu was with Texas Instruments where he was responsible for analog, mixed signal, and RF system-on-chip development for wireless and wireline communication transceivers. His current areas of research are power and battery management circuits, Analog-to-Digital and Digital-to-Analog converters for instrumentation and telecommunication circuits, frequency synthesizers, and self-test and self-healing of mixed signal circuits. He was the General Chair for 2015 IEEE Radio Frequency Integrated Circuits Conference and founding chair of the IEEE Solid State Circuits Society Phoenix Chapter. He was an Associate Editor of IEEE Transactions on Microwave Theory and Techniques, IEEE Transactions on Circuits and Systems I and II. He is a member of IEEE International Microwave Symposium organizing committee.
Collaborations and industry affiliations
ERC for Quantum Energy and Sustainable Solar Technologies, NSF-DOE
Microwave sensors for vital signs monitoring device design, NSF-ENG
Electrical stimulus-based built-in self characterization for calibration and process feedback of MEMS devices, Semiconductor Research Corp.
Unconditionally stable low dropout regulators for extreme environments, SJT
Clock multiplier and serial I/O circuits for ultra power on-chip Ads, Nutrek
I/UCRC Autonomous self-healing sensor network radio and mixed-signal readout system, NSF, Texas Instruments
Read-out integrated circuit for vibrometry, FLIR
SOI MESFETs for ultra-low power electronic circuits, phase 2 project, SJT
Wearable nanosensors array for real-time monitoring of diesel and gasoline exhaust exposure, UC Riverside
Design Leader, Texas Instruments Mixed Signal Wireless Design Group, 1995-2004
Ph.D., electrical engineering, Oregon State University, 1995
M.S.C., University of Houston, 1992
Steering Committee member, IEEE Radio Frequency Integrated Circuits Conference
Founding Chair, IEEE Solid State Circuits Society Phoenix Chapter
Associate Editor, IEEE Transactions on Circuits and System
Shankar Thirunakkarasu, Bertan Bakkaloglu, “Built-in Self-Calibration and Digital-Trim Technique for 14-Bit SAR ADCs Achieving 1 LSB INL”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems. vol:23, no:5, 2014.
Ahmad Dashtestani, Bertan Bakkaloglu, “A Fast Settling Oversampled Digital Sliding-Mode DC–DC Converter”, IEEE Transactions on Power Electronics, Volume: 30, no: 2 pp: 1019-1027, 2015.
Naveen Suda, Jounghyuk Suh, Nagib Hakim, Yu Cao, Bertan Bakkaloglu, “A 65 nm Programmable ANalog Device Array (PANDA) for Analog Circuit Emulation”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol: 63, no: 2, Year: 2016.
S. Min, T. Copani, S. Kiaei, B. Bakkaloglu, “A 90-nm CMOS 5-GHz Ring-Oscillator PLL With Delay-Discriminator-Based Active Phase-Noise Cancellation”, IEEE Journal of Solid State Circuits, vol: 48, no: 5, pp:1151-1160, 2013.
H. Hedayati and B. Bakkaloglu, “A 3 GHz wideband Σ Δ fractional-N synthesizer with switched-RC sample-and-hold PFD,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 20, no. 9, pp. 1681-1690, 2012.
W. Khalil, S. Shashidharan, T. Copani, S. Chakraborty, S. Kiaei, and B. Bakkaloglu, “A 405-MHz all-digital fractional-frequency-locked loop for ISM band applications,” IEEE Transactions on Microwave Theory and Techniques, vol. 59, no. 5, pp. 1319-1326, May 2011.
T. Copani, S. Min, S. Shashidharan, S. Chakraborty, M. Stevens, S. Kiaei, and B. Bakkaloglu, “A CMOS low-power transceiver with reconfigurable antenna interface for medical implant applications,” IEEE Transactions on Microwave Theory and Techniques, vol. 59, no. 5, pp. 1369-1378, May 2011.
K. Chandrashekar, M. Corsi, J. Fattaruso, and B. Bakkaloglu, “A 20-MS/s to 40-MS/s reconfigurable pipeline ADC implemented with parallel OTA scaling,” IEEE Transactions on Circuits and Systems, vol. 57, no. 8, pp. 602-606, Aug. 2010.